Reducing EMI in the Flyback topologies
The topic of Magnetics is becoming one of the most important tasks of every power electronics engineer. Therefore, at Frenetic, we are working on different technologies, experiments, research focused on the Magnetic components. This article talks about EMI in Flyback circuits.
One of the most common questions we receive when talking to engineers with expertise in Flyback magnetics is:
Can you (Frenetic) help in the EMI reduction?
Most engineers already have their design spreadsheet (which is not always the best option), but they don´t have any idea about what to do for reducing EMI noise in their Flybacks. Since not everyone could be an expert in EMI, let’s start defining the problem.
Main sources of noise:
As you may know, switch-mode power supplies produce electromagnetic noise due to the fast voltage or current transitions. In the Flyback, there are two main sources of noise:
High dV/dt point.
The net between the transformer and the transistor. The transistor switches very fast and the voltage there changes very fast producing a lot of noise. This noise travels through the parasitic capacitance between primary and secondary.
Figure 1. Flyback schematic. Marked the noise net and the intrawinding capacitance.
High dI/dt current loops.
Just having a dI/dt loop is a problem itself. In the Flyback we can have fast-changing currents in three parts. In the picture below you can see these loops. The best way to avoid this kind of problem is to decrease the distance between the pads in the layout of the PCB.
Figure 2. Flyback schematic. Marked the current loops generating EMI.
In this first stage, we will focus on the High dV/dt noise, which is attenuated with a CM filter plus Y capacitors at the input. However, the transformer construction has a lot of impact on the EMI results. I have used the publication of TI of Isaac Cohen to build my explanation.
Flyback Transformer techniques for reducing EMI
As we have seen in Picture X, the CM current,Icm, that flows from primary to secondary through the interwinding capacitance of the transformer. Therefore, reducing the interwinding capacitance between primary and secondary, minimize the Icm.
Method I: Transformer Shields:
The shield layers (Figure 3) are cooper layers included in the windings to give a lower impedance path to the Icm. This layer should be as thin as possible to minimize eddy current losses and is usually connected to the local primary ground (or any other quiet ground). Shield layers don´t eliminate the interwinding capacitance but reduce the current flowing through them. For interleaving windings, several shield layers will be needed.
Figure 3. Flyback schematic with shield layer.
Method II: Cancellation Windings:
Another method is to include auxiliary cancellation winding. The polarity of the auxiliary winding is oriented to produce a canceling current by adjusting the number of turns. Basically, this auxiliary winding goal is canceling the Icm, generating another Icm with reverse polarity, having zero net CM current flowing to the output. The manufacturing process in this case is more complex.
Figure 4. Flyback schematic with auxiliary cancellation winding.
Another solution is to arrange the auxiliary winding to achieve a CM balance. That means, instead of connecting the winding to the primary ground, is connected to an auxiliary ground, ensuring the voltage balance. In the picture below you can see the schematic with this auxiliary strategy (NB2) and shield layers too.
Figure 5. Flyback schematic with auxiliary EMI cancellation windings.
In the design guide of TI, they analyze a lot of different solutions and their impact on reducing the EMI noise. Here, I would like to show you one of the examples included in the TI publication. Figure 6 represents the construction of the schematic of Figure 5. The component has an additional auxiliary winding for supplying the controller (NB1), the CM cancellation winding (NB2), and the shield layer.
Figure 6. Winding strategy for the schematic of Figure 5.
As you can see, the shield layer between primary and secondary is closer to the external part and windings (NB1 and NB2) are in a single layer. The primary is split into two layers to reduce the leakage inductance.
Impact of Shield and Auxiliary Layers
In this section, we will go to the specific example discussed in the TI guide of the impact on the EMI of using those techniques.
The transformer of the picture is designed for the following specs:
- 65W - Flyback converter
- Universal Input (Nominal 230 VAC, 60Hz)
- 19,5V output
- Turn ratio 5
- The complete specs are derived from UCC28630EVM572.
The transformer below includes both shielding methods (considering layer 1 the closer to the central leg):
- Between layer 1 of primary and layer 3 of secondary winding, there is an auxiliary shielding winding (layer 2) connected to the primary ground.
- Between layer 3 of secondary and layer 5 of primary winding, there is a shield layer (layer 4) connected to primary ground.
Figure 7. Transformer design strategy
Figure 8 shows the EMI measurement without connecting the shielding layers. As you can see the conducted measurements of the Quasy Peak (QP) and Average (AVG) measurements cross the limited lines. That means those harmonics will be attenuated by the input EMI filter which will increase in size.
Figure 8. Conducted EMI with shield layers disconnected. Conditions: 65W 230 Vac, QP results in blur, AVG in green
In Figure 9, it’s the same experiment, but connecting the shielding layers to the ground, allowing them to give a path to the noise to the ground.
Figure 9. Conducted EMI with shield layers connected. Conditions: 65W 230 Vac, QP results in blur, AVG in green
The result is: The conducted EMI is reduced by 20 dB. That’s a great improvement, because we can decrease the input filter and save space and weight.
An interesting comment not related to the EMI. They have built two transformers with very similar construction to quantify the impact of the losses due to the Llk and the Rac. In one of them, they include 14 additional tape layers to increase the Llk by 40%. The result of efficiency was 88.39 percent.
The same design without those 14 layers and 40% less of Llk has an overall efficiency of 89.03 percent.
The impact of having a 40% more Llk is translated into 0,64 percent lower efficiency. This demonstrates that not only having a lower Rac is important but having a better coupling and storing lower extra energy has also an impact.
If you want to verify your Llk and Rac, you can now get your 7-days trial at Frenetic and simulate your magnetics.
The definition of Quasi Peak and Average in this context is:
*Quasi-peak detection weighs each component based on its repetition rate: the faster the repetition rate, the higher the weight is given to that component.
*Average detection provides the average amplitude of each signal component across its period
There are two main conclusions:
The first one is that using shield techniques, the EMI can be reduced decreasing the cost and size of the EMI filter.
The second one, the LLk is affected by the winding and shield strategy and affects to the efficiency of the power system. Reduce as much as possible the Llk.
We have based this article on the work of Isaac Cohen of TI (TI Flyback design guide), a great engineer who has supported our research at Frenetic about core losses.